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The Libera Digit 500 is a low-noise and wide dynamic range digitizer with 4 channels and a sampling frequency of max. 500 MHz, phase locked to an external reference signal. The data is stored in a configurable segmented buffer, with different acquisition modes and trigger rates up to 1 kHz. Instrument is available in AC and DC coupled version. The DC-coupled version has a front end with 250 MHz bandwidth, suitable for time-domain processing of signals coming from different types of sensors. The AC-coupled front end has a bandwidth ranging from 1 MHz to 2 GHz and is suitable for narrow-band signals and digital down-conversion applications. The front end can also be customized to include different types of analog filtering/conditioning.
Benefits:
Data Processing:
Each of the four inputs is adjusted in amplitude with a 31 dB software-controlled variable attenuator and later sampled by the ADC converter with sampling controlled by an external reference signal locked through a phase-locked-loop (PLL). The ADC data offset can be removed in the FPGA before the data is stored. One LEMO trigger input is used to trigger the data acquisition in a large ADC buffer with a total size of 4 GB. The buffer can be segmented in chunks of minimum 32768 samples and can be acquired in different modes. The Libera Digit 500 can be further extended by the user with modifications to the FPGA and software code (available under a non-disclosure agreement). Additional features or functionalities can be also added by our developers.
Performances:
The dynamic range of the system is over 90 dB.
Variant | DC | AC |
General product code | L5001.00D | L5001.00A |
Channel number | 4 | 4 |
Sampling frequency [MS/s] | 500 | 500 |
Resolution [bit] | 14 | 14 |
BW | DC-250 MHz | 1Mhz - 2 GHz |
Coupling | 50 Ω | 50 Ω |
Max input | 1 V/10 dBm | 1 V/10 dBm |
Input again / attenuation | 0-31 dB | 0-31 dB |
Triggering frequency [Hz] | 3.3 V TTL LEMO | 3.3 V TTL LEMO |
Max trigger frequency [Hz] | 500 (can be extended up to 1000) | 500 (can be extended up to 1000) |
Reference clock | Yes | Yes |
FPGA | Xilinx Zynq 7035 | Xilinx Zynq 7035 |
PoE | No | No |
Access interfaces | SSH/Tango/Epics | SSH/Tango/Epics |
Available extensions (SW to be developed by the user) | - DAI1 module - SFP connectors on Libera Digit 500 | - DAI1 module - SFP connectors on Libera Digit 500 |
Max acquisition length [samples] | 500 M | 500 M |
Dimensions | H: 2 U, W: 19" (rack mountable), D: 236 mm | H: 2 U, W: 19" (rack mountable), D: 236 mm |
Pulse processing module: pulse area calculation, pulse width calculation, root square sum, and integral sum |
SFP connectors: four optional small pluggable slots (SFP) which can be used for fast data |
Digital phase shifters to fine-tune the phase differences between the input channels |
Digital Downconverter module: allows extraction of the amplitude and frequency of a specific signal component |
Bunch Charge Calculation module: allows the calculation of the bunch charge over several turns in electron synchrotrons |
Libera Digit 500 is used at the following labs:
Can’t find your discipline or profession? Write to us and we’ll
do our best to work something out.
We adjust our services to your needs.